Functional Description
The CY7C1299A SRAM integrates 32,768 × 36 SRAM cells with advanced synchronous peripheral circuitry. It employs high-speed, low-power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology. Each memory cell consists of four transistors and two high-valued resistors.

Features
• Fast clock speed: 100 and 83 MHz
• Fast access times: 5.0/6.0 ns max.
• Single clock operation
• Single 3.3V –5% and +5% power supply VCC
• Separate VCCQ for output buffer
• Two chip enables for simple depth expansion
• Address, data input, CE1, CE2, PTX, PTY, WEX, WEY, and data output registers on-chip
• Concurrent Reads and Writes
• Two bidirectional data buses
• Can be configured as separate I/O
• Pass-through feature
• Asynchronous output enables (OEX, OEY)
• LVTTL-compatible I/O
• Self-timed Write
• Automatic power-down
• 176-pin TQFP package