GENERAL DESCRIPTION The ADSP-BF535 processor is a member of the Blackfin processor family of products, incorporating the Micro Signal Architecture (MSA), jointly developed by Analog Devices, Inc. and Intel Corporation. The architecture combines a dual MAC state-of-the-art signal processing engine, the advantages of a clean, orthogonal RISC-like microprocessor instruction set, and Single-Instruction, Multiple Data (SIMD) multimedia capabilities into a single instruction set architecture. KEY FEATURES 350 MHz High Performance Blackfin Processor Core Two 16-Bit MACs, Two 40-Bit ALUs, One 40-Bit Shifter, Four 8-Bit Video ALUs, and Two 40-Bit Accumulators RISC-Like Register and Instruction Model for Ease of Programming and Compiler Friendly Support Advanced Debug, Trace, and Performance Monitoring 1.0 V–1.6 V Core VDD with Dynamic Power Management 3.3 V I/O 260-Ball PBGA Package MEMORY 308K Bytes of On-Chip Memory: 16K Bytes of Instruction L1 SRAM/Cache 32K Bytes of Data L1 SRAM/Cache 4K Bytes of Scratch Pad L1 SRAM 256K Bytes of Full Speed, Low Latency L2 SRAM Memory DMA Controller Memory Management Unit for Memory Protection Glueless External Memory Controllers Synchronous SDRAM Support Asynchronous with SRAM, Flash, ROM Support PERIPHERALS 32-Bit, 33 MHz, 3.3 V, PCI 2.2 Compliant Bus Interface with Master and Slave Support Integrated USB 1.1 Compliant Device Interface Two UARTs, One with IrDA® Two SPI Compatible Ports Two Full-Duplex Synchronous Serial Ports (SPORTs) Four Timer/Counters, Three with PWM Support Sixteen Bidirectional Programmable Flag I/O Pins Watchdog Timer Real-Time Clock On-Chip PLL with 1x to 31x Frequency Multiplier
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