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DSP56857 Arkusz danych(PDF) 167 Page - Freescale Semiconductor, Inc |
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DSP56857 Arkusz danych(HTML) 167 Page - Freescale Semiconductor, Inc |
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167 / 662 page ![]() OCCS Interrupts On-Chip Clock Synthesis (OCCS), Rev. 4 Freescale Semiconductor 6-17 6.8 OCCS Interrupts The CGM generates a single interrupt request to the INTC. This interrupt is generated by the lock detector circuitry LCK0 and LCK1 outputs and is enabled by the LCK0 Interrupt Enable and LCK1 Interrupt Enable bits in the CGMCR. This interrupt can be used to detect when the PLL goes into lock or when it falls out of lock. The interrupt is cleared by writing a 1 to the LCK0 and/or LCK1 bits of the CGMCR. |
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