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STR720 Arkusz danych(PDF) 159 Page - STMicroelectronics |
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STR720 Arkusz danych(HTML) 159 Page - STMicroelectronics |
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159 / 401 page ![]() STR720 - REAL TIME CLOCK (RTC) 159/401 at least one CLK_AF period, i.e. about 30 µs using 32 kHz crystal oscillator), it is important to consider it when RTC register update occurs within an interrupt response routine, since also interrupt pending bits, located in RTCCR, can be cleared only when RTOFF is ‘1’. As a consequence it is recommended to clear IRQ pending bits before or during the same configuration procedure used to update other RTC registers. 1 |
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