STR720 datasheet(199/401 Pages) STMICROELECTRONICS

199 / 401 page

STR720 - BUFFERED SPI (BSPI)

199/401

Note

The value set in RBURST_LEN field should match with the configured burst length

set in the corresponding DMA channel (SoBurst field in DMA control register).

Bits 3:2 = TBURST_LEN [1:0]: Transmit BURST LENgth

These bits configure the burst length when the BSPI transmits data. This programmable

length is used to set the number of data words the DMA controller is expected to send upon a

transmit request; this value is used in the DMA interface to determine when the BSPI is ready

to receive a data burst from the DMA. A word can be 16 bit or 8 bit wide according to the

configuration set in WL bits inside BSPCSR1 register.

Note

The value set in TBURST_LEN field should match with the configured burst length

set in the corresponding DMA channel (SoBurst field in DMA control register).

Bit 1 = DMA_EN: DMA interface ENable

This bit is a general enable switch for the DMA interface. When BSPI DMA interface is

disabled no request line will be activated and data transfer can occur through interrupt

notification only.

0 = DMA interface is disabled.

1 = DMA interface is enabled.

Bit 0 = MASK_SS: MASK Slave Select

This bit can be used to mask the status of Slave Select pin when BSPI is in master mode and

the pad corresponding to SS pin is not available. When this bit is set to ‘1’, the Bus Error

interrupt condition cannot be detected since internally the related signal is always considered

high regardless from the actual pad status.

0 = Slave Select pin is used.

1 = Slave Select pin is masked.

RBURST_

LEN[1:0]

BURST LENGTH

1 word transferred

4 words transferred

8 words transferred

16 words transferred