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Zakładka z wyszukiwarką danych komponentów |
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Zakładka z wyszukiwarką danych komponentów |
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STM32W108CB Arkusz danych(PDF) 213 Page - STMicroelectronics |
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STM32W108CB Arkusz danych(HTML) 213 Page - STMicroelectronics |
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213 / 278 page  STM32W108HB STM32W108CC STM32W108CB STM32W108CZ General-purpose timers Doc ID 16252 Rev 14 213/278 10.3.17 Timer x capture/compare 4 register (TIMx_CCR4) Address offset: 0xE040 (TIM1) and 0xF040 (TIM2) Reset value: 0x0000 0000 Reserved, must be kept at reset value See description in the TIMx_CCR1 register 10.3.18 Timer 1 option register (TIM1_OR) Address offset: 0xE050 Reset value: 0x0000 0000 Reserved, must be kept at reset value ORRSVD CLKMSKEN EXTRIGSEL[1:0]: 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 Reserved 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 CCR[15:0] rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw Bits [31:16] Bits [15:0] 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 Reserved 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Reserved OR RSVD CLK MSKEN EXTRIGSEL[1:0] rw rw rw rw Bits [31:4] Bit 3 Reserved: this bit must always be set to 0 Bit 2 Enables TIM1MSK when TIM1CLK is selected as the external trigger: 0 = TIM1MSK not used, 1 = TIM1CLK is ANDed with the TIM1MSK input. Bits [1:0] Selects the external trigger used in external clock mode 2: 0 = PCLK, 1 = calibrated 1 kHz clock, 2 = 32 kHz reference clock (if available), 3 = TIM1CLK pin. |
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