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TMS320DM647 Arkusz danych(PDF) 101 Page - Texas Instruments |
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TMS320DM647 Arkusz danych(HTML) 101 Page - Texas Instruments |
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101 / 166 page ![]() www.ti.com AECLKOUT ACEx ABE[7:0] AEA[19:0]/ ABA[1:0] AED[63:0] AAOE/ASOE(A) AR/W AAWE/ASWE(A) AARDY(B) ByteEnables Address WriteData Hold=1 12 Strobe=4 Setup=1 12 12 12 12 13 13 11 11 11 11 11 DEASSERTED AECLKOUT AARDY(A) ASSERTED DEASSERTED Strobe Hold=2 ExtendedStrobe Strobe Setup=2 8 9 6 5 7 7 TMS320DM647/TMS320DM648 Digital Media Processor SPRS372 – MAY 2007 A. AAOE/ASOE and AAWE/ASWE operate as AAOE (identified under select signals) and AAWE, respectively, during asynchronous memory accesses. B. Polarity of the AARDY signal is programmable through the AP field of the EMIFA Async Wait Cycle Configuration register (AWCC). Figure 6-16. Asynchronous Memory Write Timing for EMIFA A. Polarity of the AARDY signal is programmable through the AP field of the EMIFA Async Wait Cycle Configuration register (AWCC). Figure 6-17. AARDY Timing Submit Documentation Feedback Peripheral Information and Electrical Specifications 101 |
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