 |
Zakładka z wyszukiwarką danych komponentów |
|
|
Zakładka z wyszukiwarką danych komponentów |
|
R7KA8M2AFDCAM Arkusz danych(PDF) 195 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
R7KA8M2AFDCAM Arkusz danych(HTML) 195 Page - Renesas Technology Corp |
|
|
195 / 295 page  Note 5. On a Legacy Bus where I2C Devices need to see Start Note 6. Slaves that do not support the optional ENTASx CCCs shall use the tCAS Max value shown for ENTAS3 Note 7. On a Mixed Bus with Fm Legacy I2C Devices, tAVAL is 300 ns shorter than the Fm Bus Free Condition time (tBUF) Table 2.72 I3C timing (Push-Pull Timing Parameters for SDR and HDR-DDR Modes) Setting of the I3C_SCL0, I3C_SDA0 pins are not required with the Port Drive Capability bit in the PmnPFS register. Parameter Symbol VCC Min Max Unit Test condition s I3C Push- Pull Timing Parameter s for SDR and HDR- DDR Modes SCL Clock Frequency fSCL*1 3.00 V or above 0.01 12.5 MHz — 1.65 to 1.95 V 0.01 12.5 SCL Clock Low Period tLOW 3.00 V or above 27 — ns Figure 2.91 1.65 to 1.95 V 32 — tDIG_L*2 *4 3.00 V or above 35 — ns Figure 2.91 1.65 to 1.95 V 40 — SCL Clock High Period for Mixed Bus tHIGH_MIXE D 3.00 V or above 24 — ns Figure 2.91 1.65 to 1.95 V 27 — tDIG_H_MIX ED *2 *3 3.00 V or above 32 45 ns Figure 2.91 1.65 to 1.95 V 35 45 SCL Clock High Period tHIGH 3.00 V or above 24 — ns Figure 2.91 1.65 to 1.95 V 27 — tDIG_H*2 3.00 V or above 32 — ns Figure 2.91 1.65 to 1.95 V 35 — Clock in to Data Out for Slave tSCO 3.00 V or above — 12 ns Figure 2.96 1.65 to 1.95 V — 12 SCL Clock Rise Time tCR 3.00 V or above — 150 × 1 / fSCL (capped at 60) ns Figure 2.91 1.65 to 1.95 V — 150 × 1 / fSCL (capped at 60) SCL Clock Fall Time tCF 3.00 V or above — 150 × 1 / fSCL (capped at 60) ns Figure 2.91 1.65 to 1.95 V — 150 × 1 / fSCL (capped at 60) SDA Signal Data Hold in Push-Pull Mode Master tHD_PP*4*5 3.00 V or above tCR + 3 and tCF + 3 — — Figure 2.95 1.65 to 1.95 V tCR + 3 and tCF + 3 — Slave tHD_PP*5 3.00 V or above 0 — — Figure 2.95 1.65 to 1.95 V 0 — SDA Signal Data Setup in Push-Pull Mode tSU_PP 3.00 V or above 12 N/A ns Figure 2.97 1.65 to 1.95 V 18 N/A Clock After Repeated START (Sr) tCASr 3.00 V or above tCASmin N/A ns Figure 2.99 1.65 to 1.95 V tCASmin N/A Clock Before Repeated START (Sr) tCBSr 3.00 V or above tCASmin / 2 N/A ns Figure 2.99 1.65 to 1.95 V tCASmin / 2 N/A Capacitive Load per Bus Line (SDA/SCL) Cb 3.00 V or above — 50 pF — 1.65 to 1.95 V — 50 RA8M2 Datasheet 2. Electrical Characteristics R01DS0438EJ0130 Rev.1.30 Feb 27, 2026 Page 195 of 295 |
|
Link URL |
| Czy Alldatasheet okazała się pomocna? [ DONATE ] |
O Alldatasheet | Reklama | Kontakt | Polityka prywatności | Link do karty katalogowej | Linki | Lista producentów All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Polish ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
