 |
Zakładka z wyszukiwarką danych komponentów |
|
|
Zakładka z wyszukiwarką danych komponentów |
|
ST72622K2 Arkusz danych(PDF) 101 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
ST72622K2 Arkusz danych(HTML) 101 Page - STMicroelectronics |
|
|
101 / 132 page  ST7262 101/132 OPERATING CONDITIONS (Cont’d) Figure 55. fCPU Versus VDD for low voltage devices 12.3.2 Operating Conditions with Low Voltage Detector (LVD) Subject to general operating conditions for VDD, fCPU, and TA. Refer to Figure 15 on page 21. Notes: 1. Not tested, guaranteed by design. 2. Not tested in production, guaranteed by characterization. 3. The VDD rise time rate condition is needed to insure a correct device power-on and LVD reset. Not tested in production. fCPU [MHz] SUPPLY VOLTAGE [V] 8 4 2 0 2.5 3.0 3.5 4 4.5 5 5.5 FUNCTIONALITY NOT GUARANTEED IN THIS AREA FUNCTIONALITY GUARANTEED IN THIS AREA (UNLESS OTHERWISE SPECIFIED IN THE TABLES OF PARAMETRIC DATA) Symbol Parameter Conditions Min Typ 1) Max Unit VIT+ Low Voltage Reset Threshold (VDD rising) VDD Max. Variation 50V/ms 3.6 3.8 3.95 V VIT- Low Voltage Reset Threshold (VDD falling) VDD Max. Variation 50V/ms 3.45 3.65 3.8 V Vhyst Hysteresis (VIT+ - VIT-) 120 2) 150 2) 180 2) mV VtPOR VDD rise time rate 3) 0.5 50 V/ms |
|
Link URL |
| Czy Alldatasheet okazała się pomocna? [ DONATE ] |
O Alldatasheet | Reklama | Kontakt | Polityka prywatności | Link do karty katalogowej | Linki | Lista producentów All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Polish ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
