ADE75 datasheet(146/148 Pages) AD

146 / 148 page

ADE75xx/ADE71xx

Preliminary Technical Data

Rev. PrE | Page 146 of 148

BCTRL

input disabled

input enabled

Controls the function of

INT0PRG

Function

input disabled

INT0PRG

input enabled

Table 147.Table 148. The alternate functions of Port 0 pins can be activated only if the corresponding bit latch in the P0 SFR contains a 1.

Otherwise, the port pin remains at 0.

PORT 1

Port 1 is an 8-bit bidirectional port controlled directly through the bit-addressable Port 1 SFR (90H). The weak internal pull-ups for Port

1 are configured through the Port 1 Weak pull-up enable SFR (PINMAP1, 0xB3); they are enabled by default. Disable the weak internal

pull-up by writing a one to P1CFG..x.

Port 1 pins also have various secondary functions as described in Table 149. The alternate functions of Port 1 pins can be activated only if

the corresponding bit latch in the P1 SFR contains a 1. Otherwise, the port pin remains at 0.

PORT 2

Port 2 is a 4-bit bidirectional port controlled directly through the bit-addressable Port 2 SFR (A0H). Note that P2.3 can be used as an

output only. The weak internal pull-ups for Port 2 are configured through the Port 2 Weak pull-up enable SFR (PINMAP2, 0xB4); they are

enabled by default. Disable the weak internal pull-up by writing a one to P2CFG..x.

Port 2 pins also have various secondary functions as described in Table 150. The alternate functions of Port 2 pins can be activated only if

the corresponding bit latch in the P2 SFR contains a 1. Otherwise, the port pin remains at 0.

ADE75 Arkusz danych(PDF) 146 Page - Analog Devices