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M37207MF Arkusz danych(PDF) 106 Page - Renesas Technology Corp |
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M37207MF Arkusz danych(HTML) 106 Page - Renesas Technology Corp |
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106 / 122 page ![]() 105 MITSUBISHI MICROCOMPUTERS M37207MF-XXXSP/FP, M37207M8-XXXSP M37207EFSP/FP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER and ON-SCREEN DISPLAY CONTROLLER I2C Control Register I2C Status Register Address 00DC16 Address 00DB16 b7 b6 b5 b4 b3 b2 b1 b0 I2C status register (S1) [Address 00DB16] I2C Status Register 0 3 4 5 6, 7 b7 b6 0 0 : Slave recieve mode 0 1 : Slave transmit mode 1 0 : Master recieve mode 1 1 : Master transmit mode 1 2 0 0 0 0 0 B Name Functions After reset RW Communication mode specification bits (TRX, MST) 0 : Bus free 1 : Bus busy Bus busy flag (BB) 0 : Interrupt request issued 1 : No interrupt request issued I2C-BUS interface interrupt request bit (PIN) 0 : Not detected 1 : Detected Arbitration lost detecting flag (AL) (See note) 0 : Address mismatch 1 : Address match Slave address comparison flag (AAS) (See note) 0 : No general call detected 1 : General call detected General call detecting flag (AD0) (See note) 0 : Last bit = “0 ” 1 : Last bit = “1 ” Last receive bit (LRB) (See note) Note : These bits and flags can be read out, but cannnot be written. Indeterminate R— R— R— R— R— RW 0 RW b7 b6 b5 b4 b3 b2 b1 b0 0 to 2 Bit counter (Number of transmit/recieve bits) (BC0 to BC2) b2 b1 b0 0 0 0 : 8 0 0 1 : 7 0 1 0 : 6 0 1 1 : 5 1 0 0 : 4 1 0 1 : 3 1 1 0 : 2 1 1 1 : 1 3 I2C-BUS interface use enable bit (ESO) 0 : Disabled 1 : Enabled 4 Data format selection bit (ALS) 0 : Addressing mode 1 : Free data format 5 Addressing format selection bit (10BIT SAD) 0 : 7-bit addressing format 1 : 10-bit addressing format 6, 7 Connection control bits between I C-BUS interface and ports b7 b6 Connection port (See note) 0 0 : None 0 1 : SCL1, SDA1 1 0 : SCL2, SDA2 1 1 : SCL1, SDA1 SCL2, SDA2 0 0 0 0 0 I2C control register (S1D : address 00DC 16) I2C Control Register B Name Functions After reset RW Note: When using ports P11-P14 as I C-BUS interface, the output structure changes automatically from CMOS output to N-channel open-drain output. 2 2 RW RW RW RW RW |
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