PIC24FJ128GA006 datasheet(146/258 Pages) MICROCHIP

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PIC24FJ128GA010 FAMILY

DS39747F-page 146

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17.1

UARTx Baud Rate Generator

(BRG)

The UARTx module includes a dedicated, 16-bit Baud

Rate Generator. The UBRGx register controls the

period of a free-running, 16-bit timer. Equation 17-1

shows the formula for computation of the baud rate

with BRGH = 0.

EQUATION 17-1:

UARTx BAUD RATE WITH

BRGH = 0(1)

Example 17-1 shows the calculation of the baud rate

error for the following conditions:

•FCY = 4 MHz

• Desired Baud Rate = 9600

The maximum baud rate (BRGH = 0) possible is

FCY/16 (for UBRGx = 0) and the minimum baud rate

possible is FCY/(16 * 65536).

Equation 17-2 shows the formula for computation of

the baud rate with BRGH = 1.

EQUATION 17-2:

UARTx BAUD RATE WITH

BRGH = 1(1)

The maximum baud rate (BRGH = 1) possible is FCY/4

(for UBRGx = 0) and the minimum baud rate possible

is FCY/(4 * 65536).

Writing a new value to the UBRGx register causes the

BRG timer to be reset (cleared). This ensures the BRG

does not wait for a timer overflow before generating the

new baud rate.

EXAMPLE 17-1:

BAUD RATE ERROR CALCULATION (BRGH = 0)(1)

Note 1:

Based on FCY = FOSC/2; Doze mode

and PLL are disabled.

Baud Rate =

FCY

16 • (UBRGx + 1)

FCY

16 • Baud Rate

UBRGx =

– 1

Baud Rate =

FCY

4 • (UBRGx + 1)

FCY

4 • Baud Rate

UBRGx =

– 1

Note 1:

Based on FCY = FOSC/2; Doze mode

and PLL are disabled.

Desired Baud Rate

FCY/(16 (UBRGx + 1))

Solving for UBRGx value:

BRGx

((FCY/Desired Baud Rate)/16) – 1

BRGx

((4000000/9600)/16) – 1

BRGx

Calculated Baud Rate

4000000/(16 (25 + 1))

9615

Error

(Calculated Baud Rate – Desired Baud Rate)

Desired Baud Rate

(9615 – 9600)/9600

0.16%

Note 1:

Based on FCY = FOSC/2; Doze mode and PLL are disabled.

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