PIC18F2525IMLSQTP datasheet(228/412 Pages) MICROCHIP

228 / 412 page

PIC18F2525/2620/4525/4620

DS39626E-page 226

The analog reference voltage is software selectable to

either the device’s positive and negative supply voltage

(VDD and VSS), or the voltage level on the RA3/AN3/

VREF+ and RA2/AN2/VREF-/CVREF pins.

The A/D converter has a unique feature of being able

to operate while the device is in Sleep mode. To

operate in Sleep, the A/D conversion clock must be

derived from the A/D’s internal RC oscillator.

The output of the sample and hold is the input into the

converter, which generates the result via successive

approximation.

A device Reset forces all registers to their Reset state.

This forces the A/D module to be turned off and any

conversion in progress is aborted.

Each port pin associated with the A/D converter can be

configured as an analog input, or as a digital I/O. The

ADRESH and ADRESL registers contain the result of

the A/D conversion. When the A/D conversion is

complete,

the

result

loaded

into

the

ADRESH:ADRESL register pair, the GO/DONE bit

(ADCON0 register) is cleared and A/D Interrupt Flag bit,

ADIF, is set. The block diagram of the A/D module is

shown in Figure 19-1.

FIGURE 19-1:

A/D BLOCK DIAGRAM

(Input Voltage)

VAIN

VREF+

Reference

Voltage

VDD

VCFG1:VCFG0

CHS3:CHS0

AN7(1)

AN6(1)

AN5(1)

AN4

AN3

AN2

AN1

AN0

0111

0110

0101

0100

0011

0010

0001

0000

10-Bit

Converter

VREF-

VSS

A/D

AN12

AN11

AN10

AN9

AN8

1100

1011

1010

1001

1000

Note 1:

Channels AN5 through AN7 are not available on 28-pin devices.

I/O pins have diode protection to VDD and VSS.

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