AM8530 datasheet(137/194 Pages) AMD

137 / 194 page

AMD

6–27

D7 D6 D5 D4 D3 D2 D1 D0

TC11

TC12

TC13

TC14

TC8

TC9

TC10

TC15

Upper Byte of

Time Constant

Figure 6–15. Write Register 13

6.2.15

Write Register 14 (Miscellaneous Control Bits)

WR14 contains some miscellaneous control bits. Bit positions for WR14 are shown in Fig-

ure 6–16.

D7 D6 D5 D4 D3 D2 D1 D0

BR Generator Enable

BR Generator Source

DTR/REQUEST Function

Local Loopback

Auto Echo

Null Command

Enter Search Mode

Reset Missing Clock

Disable DPLL

Set Source = BR Generator

Set Source =

RTxC

Set FM Mode

Set NRZI Mode

DPLL Commands

Figure 6–16. Write Register 14

Bits 7 and 5: Digital Phase-Locked Loop Command Bits

These three bits encode the eight commands for the Digital Phase-Locked Loop. A chan-

nel or hardware reset disables the DPLL, resets the missing clock latches, sets the

source to the

RTxC pin and selects NRZI mode. The Enter Search Mode command en-

ables the DPLL after a reset.

Null Command (000).

This command has no effect on the DPLL.

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