IO107PDB1 datasheet(112/210 Pages) MICROSEMI

Numer części	IO107PDB1

Szczegółowy opis	ProASIC3 Flash Family FPGAs with Optional Soft ARM Support

PDF	210 Pages

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Producent	MICROSEMI [Microsemi Corporation]

Strona internetowa	http://www.microsemi.com

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ProASIC3 Flash Family FPGAs

Re vi s i on 15

2 - 107

JTAG 1532 Characteristics

JTAG timing delays do not include JTAG I/Os. To obtain complete JTAG timing, add I/O buffer delays to

the corresponding standard selected; refer to the I/O timing characteristics in the "User I/O

Characteristics" section on page 2-14 for more details.

Timing Characteristics

Table 2-125 • JTAG 1532

Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V

Parameter

Description

–2

–1

Std.

Units

tDISU

Test Data Input Setup Time

0.50

0.57

0.67

tDIHD

Test Data Input Hold Time

1.00

1.13

1.33

tTMSSU

Test Mode Select Setup Time

0.50

0.57

0.67

tTMDHD

Test Mode Select Hold Time

1.00

1.13

1.33

tTCK2Q

Clock to Q (data out)

6.00

6.80

8.00

tRSTB2Q

Reset to Q (data out)

20.00

22.67

26.67

FTCKMAX

TCK Maximum Frequency

25.00

22.00

19.00

MHz

tTRSTREM

ResetB Removal Time

0.00

tTRSTREC

ResetB Recovery Time

0.20

0.23

0.27

tTRSTMPW

ResetB Minimum Pulse

TBD

Note:

For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for

derating values.

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