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STM32F412RG Arkusz danych(PDF) 125 Page - STMicroelectronics |
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STM32F412RG Arkusz danych(HTML) 125 Page - STMicroelectronics |
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125 / 193 page ![]() DocID028087 Rev 4 125/193 STM32F412xE/G Electrical characteristics 161 Figure 38. I2C bus AC waveforms and measurement circuit 1. RS = series protection resistor. 2. RP = external pull-up resistor. 3. VDD_I2C is the I2C bus power supply. 4. The maximum data hold time has only to be met if the interface does not stretch the low period of SCL signal. 5. The minimum width of the spikes filtered by the analog filter is above tSP (max) Table 62. SCL frequency (fPCLK1= 50 MHz, VDD = VDD_I2C = 3.3 V)(1)(2) 1. RP = External pull-up resistance, fSCL = I2C speed 2. For speeds around 200 kHz, the tolerance on the achieved speed is of ±5%. For other speed ranges, the tolerance on the achieved speed is ±2%. These variations depend on the accuracy of the external components used to design the application. fSCL (kHz) I2C_CCR value RP = 4.7 kΩ 400 0x8019 300 0x8021 200 0x8032 100 0x0096 50 0x012C 20 0x02EE |
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