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STM32F412RG Arkusz danych(PDF) 145 Page - STMicroelectronics |
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STM32F412RG Arkusz danych(HTML) 145 Page - STMicroelectronics |
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145 / 193 page ![]() DocID028087 Rev 4 145/193 STM32F412xE/G Electrical characteristics 161 Figure 16: DFSDM timing diagram 6.3.25 FSMC characteristics Unless otherwise specified, the parameters given in Table 83 to Table 90 for the FSMC interface are derived from tests performed under the ambient temperature, fHCLK frequency and VDD supply voltage conditions summarized in Table 14, with the following configuration: • Output speed is set to OSPEEDRy[1:0] = 10 • Capacitance load C = 30 pF • Measurement points are done at CMOS levels: 0.5.VDD |
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