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ST92F120 - SUMMARY OF CHANGES

14 SUMMARY OF CHANGES

Rev.

Page Section

Main changes

Date

1.2

Page

1.1

1.2

Added History pages.

Updated ARC, STIM, WUIMU, SPI7, DDC, FEE.SCI replaced ZAD by ADC8

Changed order of on-chip peripheral chapters.

12/01/97

In phrase "66 (80 ...) I/O bits"; replaced "bits" with "pins".

In phrase "8-bit Analog to Digital..." replaced with "Two 8-bit Analog to Digital..."

Second col. In phrase "In addition, there is an 8 channel..." replaced with "In addi-

tion, there are two 8 channel..."

At the end of the sentence, added: "On QFP80 version, only 10 input channels are

available."

End of second col.

In phrase "Low power Run, Wait for interrupt, and STOP modes are also av." re-

placed with: "Low power Run (SLOW), Wait for Interrupt, low power Wait for inter-

rupt, HALT and STOP modes are also available."

In picture:

. Added in RCCU output signals the new: CLOCK2/8

. Removed from A/D conv. blocks the labels "zad_0" and "zad_1"

. Added in A/D CONV. 1 signals the EXTRG item

replaced INT3:0 by INT 6:0

Same as Page 5.

. Added RWN in the CPU signals (bold/no italic) leaving the italic one

Changed the picture as follow:

. Added in RCCU output signals the new: CLOCK2/8

. Removed from A/D conv. block the labels "zad"

. Duplicated A/D block like at page 5 (same input signals)

replaced INT3:0 by INT 6:0

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