PLL602-37OCL-R
AI

The **PLL602-37OCL-R** is a high-performance, low-power Clock Generator IC designed by Microchip Technology (formerly PhaseLink). It is specifically engineered to generate high-frequency differential outputs (LVPECL) from a lower frequency crystal or reference clock input.
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## 1. Technical Specifications
Below are the primary technical parameters for the PLL602-37OCL-R:
| Parameter | Specification |
| :--- | :--- |
| **Output Type** | LVPECL (Low-Voltage Positive Emitter-Coupled Logic) |
| **Input Frequency Range** | 12 MHz to 25 MHz (Crystal or Reference) |
| **Output Frequency Range** | Up to 800 MHz |
| **Supply Voltage (Vdd)** | 2.5V or 3.3V |
| **Package Type** | SOT-23 (6-pin) |
| **Operating Temperature** | 0°C to +70°C (Commercial Grade) |
| **Phase Jitter** | < 1ps RMS (12kHz to 20MHz) |
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## 2. Key Features and Architecture
The device utilizes a Phase-Locked Loop (PLL) architecture to multiply the input frequency.
### A. Frequency Multiplier
The IC contains an internal VCO (Voltage Controlled Oscillator) and dividers. It is often used to multiply a 25 MHz crystal up to a standard high-speed clock like **100 MHz, 125 MHz, or 200 MHz**.
### B. LVPECL Output
The "OCL" designation refers to the output configuration. LVPECL is preferred in high-speed data communications (like Ethernet or Fibre Channel) because it offers:
* High-speed switching.
* Excellent noise immunity.
* Low jitter.
### C. Low Power Consumption
The "PLL602" series is optimized for battery-operated or thermally sensitive designs, drawing significantly less current than traditional high-frequency oscillators.
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## 3. Pin Configuration (SOT-23-6)
Standard pinout functions for this component typically include:
1. **XIN / CLK**: Crystal input or Reference clock input.
2. **VSS**: Ground.
3. **XOUT**: Crystal feedback (Leave floating if using an external clock).
4. **OUT+**: Positive Differential Output.
5. **OUT-**: Negative Differential Output.
6. **VDD**: Power Supply.
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## 4. Typical Applications
* **Gigabit Ethernet**: Generating the 125 MHz system clock.
* **Fibre Channel**: High-speed storage networking.
* **PCI Express**: Providing stable reference clocks for serial links.
* **Set-top Boxes**: High-definition video processing clocks.
- ⤷
What is the recommended termination circuit for the LVPECL output of this IC?
- ⤷ Can this part be used with a 1.8V power supply?
- ⤷ What are the primary differences between the OCL and OCN variants of this series?