Features
• Dual output regulator: sync buck and LDO
• Independent EN, SS, and PG indicators
• ±1% reference voltage
• 1A current sourcing/sinking capability on LDO
• External clock synchronization: 100kHz to 1MHz
• Full military temperature range operation
○ TA = -55°C to +125°C
○ TJ = -55°C to +150°C
• Radiation acceptance testing - ISL70005SEH
○ HDR (50-300rad(Si)/s): 100krad(Si)
○ LDR (0.01rad(Si)/s): 75krad(Si)
• Radiation acceptance testing - ISL73005SEH
○ LDR (0.01rad(Si)/s): 75krad(Si)
• SEE hardness (see test report)
○ No SEB or SEL at LET 86.4MeV•cm2/mg
○ SET at LET 86.4MeV•cm2/mg <±3% ΔVOUT
○ No SEFI at LET 43MeV•cm2/mg
• Electrically screened to DLA SMD 5962-19209
Applications
• Point-of-load for low power FPGA core, auxiliary
and I/O supply voltages
• DDR memory power for VDDQ and VTT rails
• Distributed power system of satellite payloads