12-bit resolution
Sampling rate up to 70 MHz
3 dB bandwidth of 245 MHz
5 V power supplies and 3.3 V output power supply
Binary or twos complement CMOS outputs
In-range CMOS compatible output
TTL and CMOS compatible static digital inputs
TTL and CMOS compatible digital outputs
Differential AC or Positive Emitter-Coupled Logic (PECL) clock input; TTL compatible
Power dissipation 550 mW (typical)
Low analog input capacitance (typical 2 pF), no buffer amplifier required
Integrated sample and hold amplifier
Differential analog input
External amplitude range control
Voltage controlled regulator included
40 C to +85 C ambient temperature