Features
• Eight 0.7V differential HCSL output pairs, individually selectable
for 100MHz or 125MHz for PCIe and Ethernet applications
• One differential clock input pair CLK, nCLK can accept the
following differential input levels: LVPECL, LVDS, M-LVDS,
LVHSTL, HCSL
• One M-LVDS I/O pair (MLVDS, nMLVDS)
• Output frequency range: 98MHz - 165MHz
• Input frequency range: 19.6MHz - 165MHz
• VCO range: 490MHz - 660MHz
• PCI Express (2.5 Gb/s), Gen 2 (5 Gb/s), and Gen 3 (8 Gb/s)
jitter compliant
• External feedback for “zero delay” clock regeneration
• RMS phase jitter @ 125MHz (1.875MHz – 20MHz):
0.59ps (typical)
• Full 3.3V supply mode
• -40°C to 85°C ambient operating temperature
• Lead-free (RoHs 6) packaging