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CD54AC139 Arkusz danych (PDF) - Texas Instruments

CD54AC139 Datasheet PDF - Texas Instruments
Numer części CD54AC139
Pobierz  CD54AC139 Pobierz
Rozmiar pliku   413.25 Kbytes
Page   14 Pages
Producent  TI2 [Texas Instruments]
Strona internetowa  https://www.ti.com
Logo TI2 - Texas Instruments
Szczegółowy opis DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS

CD54AC139 Datasheet (PDF)

Go To PDF Page Pobierz Arkusz danych
CD54AC139 Datasheet PDF - Texas Instruments

Numer części CD54AC139
Pobierz  CD54AC139 Click to download

Rozmiar pliku   413.25 Kbytes
Page   14 Pages
Producent  TI2 [Texas Instruments]
Strona internetowa  https://www.ti.com
Logo TI2 - Texas Instruments
Szczegółowy opis DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS

CD54AC139 Arkusz danych (HTML) - Texas Instruments


CD54AC139 Szczegóły Produktu

AC Types Feature 1.5-V to 5.5-V Operation
and Balanced Noise Immunity at 30% of the
Supply Voltage
Buffered Inputs
Incorporate Two Enable Inputs to Simplify
Cascading and/or Data Reception
Speed of Bipolar F, AS, and S, With
Significantly Reduced Power Consumption
Balanced Propagation Delays
±24-mA Output Drive Current
– Fanout to 15 F Devices
SCR-Latchup-Resistant CMOS Process and
Circuit Design
Exceeds 2-kV ESD Protection Per
MIL-STD-883, Method 3015

description/ordering information
The ’AC139 devices are dual 2-line to 4-line decoders/demultiplexers designed for 1.5-V to 5.5-V VCC operation.
These devices are designed to be used in high-performance memory-decoding or data-routing applications
requiring very short propagation delay times. In high-performance memory systems, these decoders can be
used to minimize the effects of system decoding. When used with high-speed memories utilizing a fast enable
circuit, the delay times of these decoders and the enable time of the memory usually are less than the typical
access time of the memory. This means that the effective system delay introduced by the decoders is negligible.
The active-low enable (G) input can be used as a data line in demultiplexing applications. These
decoders/demultiplexers feature fully buffered inputs, each of which represents only one normalized load to its
driving circuit.




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