Features
Includes ST state-of-the-art patented technology
Core
• Arm® Cortex®-M33 CPU with TrustZone®,
FPU, frequency up to 250 MHz, MPU,
375 DMIPS (Dhrystone 2.1)
ART Accelerator
• 8-Kbyte instruction cache allowing
0-wait-state execution from flash and external
memories
• 4-Kbyte data cache for external memories
Benchmarks
• 1.5 DMIPS/MHz (Drystone 2.1)
• 1023 CoreMark® (4.092 CoreMark®/MHz)
Memories
• Up to 512 Kbytes of embedded flash memory
with ECC, two banks read-while-write
• Up to 48-Kbyte per bank with high-cycling
capability (100 K cycles) for data flash
• 2-Kbyte OTP (one-time programmable)
• 272 Kbytes of SRAM (80-Kbyte SRAM2 with
ECC)
• 2 Kbytes of backup SRAM available in the
lowest power modes
• Flexible external memory controller with up to
16-bit data bus: SRAM, PSRAM, FRAM,
NOR/NAND memories
• One Octo-SPI memory interface with support
for serial PSRAM/NAND/NOR, hyper
RAM/flash frame formats
• One SD/SDIO/MMC interface
Clock management
• Internal oscillators: 64 MHz HSI,
48 MHz HSI48, 4 MHz CSI, 32 kHz LSI
• External oscillators: 4-50 MHz HSE,
32.768 kHz LSE
General-purpose inputs/outputs
• Up to 112 fast I/Os with interrupt capability
(most 5 V tolerant)
• Up to ten I/Os with independent supply down to
1.08 V
Low-power consumption
• Sleep, Stop, and Standby modes
• VBAT supply for RTC, 32 backup registers
(32-bit)
Security
• Arm® TrustZone® with Armv8-M mainline
security extension
• Up to eight configurable SAU regions
• TrustZone® aware and securable peripherals