• Single 2.3 V - 3.6 V Supply
• Serial Peripheral Interface (SPI) Compatible
• Supports SPI Modes 0 and 3
• Supports Dual Output Read
• 104 MHz Maximum Operating Frequency
• Clock-to-Output (tV) of 6 ns
• Flexible, Optimized Erase Architecture for Code + Data Storage Applications
• Small (256-Byte) Page Erase
• Uniform 4-kByte Block Erase
• Uniform 32-kByte Block Erase
• Full Chip Erase
• Hardware Controlled Locking of Protected Sectors via WP Pin
• 128-byte, One-Time Programmable (OTP) Security Register
• Flexible Programming
• Byte/Page Program (1 to 256 Bytes)
• Fast Program and Erase Times
• 1.25 ms Typical Page Program (256 Bytes) Time
• 35 ms Typical 4-kByte Block Erase Time
• 250 ms Typical 32-kByte Block Erase Time
• Automatic Checking and Reporting of Erase/Program Failures
• Software Controlled Reset
• JEDEC Standard Manufacturer and Device ID Read Methodology
• Low Power Dissipation
• 350 nA Ultra-Deep Power-Down current (Typical)
• 7.5 μA Deep Power-Down Current (Typical)
• 25 μA Standby current (Typical)
• 6 mA Active Read Current (Typical)
• Endurance: 100,000 Program/Erase Cycles
• Data Retention: 20 Years
• Complies with Full Industrial Temperature Range
• Industry Standard Green (Pb/Halide-free/RoHS Compliant) Package Options
• 8-lead SOIC (150-mil)
• 8-pad Ultra Thin DFN (2 x 3 x 0.6 mm)
• 8-lead TSSOP Package