Description
The Si5324 is a low-bandwidth, jitter-attenuating, precision clock multiplier for applications requiring sub 1 ps jitter performance with loop bandwidths between 4 Hz and 525 Hz. The Si5324 accepts two input clocks ranging from 2 kHz to 710 MHz and generates two output clocks ranging from 2 kHz to 945 MHz and select frequencies to 1.4 GHz. The two outputs are divided down separately from a common source. The Si5324 can also use its external reference as a clock source for frequency synthesis. The device provides virtually any frequency translation combination across this operating range. The Si5324 input clock frequency and clock multiplication ratio are programmable via an I2C or SPI interface. The Si5324 is based on Silicon Laboratories 3rd-generation DSPLL® technology, which provides any-frequency synthesis and jitter attenuation in a highly integrated PLL solution that eliminates the need for external VCXO and filter components. The DSPLL loop bandwidth is digitally programmable, providing jitter performance optimization at the application level. The Si5324 is ideal for providing clock multiplication and jitter attenuation in high performance timing applications.

Features
■ Generates any frequency from
   2 kHz to 945 MHz and select
   frequencies to 1.4 GHz from an
   input frequency of 2 kHz to 710 MHz
■ Ultra-low jitter clock outputs as low
   as 290 fs rms (12 kHz–20 MHz), 320 fs rms (50 kHz–80 MHz)
■ Integrated loop filter with
   selectable loop bandwidth (4– 525 Hz)
■ Meets ITU-T G.8251 and Telcordia
   GR-253-CORE jitter specification
■ Hitless input clock switching with phase build-out
■ Freerun, Digital Hold operation
■ Configurable signal format per
   output (LVPECL, LVDS, CML, CMOS)
■ Support for ITU G.709 and custom
   FEC ratios (255/238, 255/237,
   255/236, 239/237, 66/64, 239/238, 15/14, 253/221, 255/238)
■ LOL, LOS, FOS alarm outputs
■ I2C or SPI programmable
■ On-chip voltage regulator with high PSNR
■ Single supply 1.8 ±5%, 2.5 ±10%, or 3.3 V ±10%
■ Small size: 6 x 6 mm 36-lead QFN
■ Pb-free, ROHS-compliant

Applications
■ Broadcast video –3G/HD/SD-SDI, Genlock
■ Packet Optical Transport Systems (P-OTS), MSPP
■ OTN/OTU-1/2/3/4 Asynchronous
   Demapping (Gapped Clock)
■ SONET OC-48/192/768, SDH/STM-16/64/256 line cards
■ 1/2/4/8/10G Fibre Channel line cards
■ GbE/10/40/100G Synchronous Ethernet (LAN/WAN)
■ Data converter clocking
■ Wireless base stations
■ Test and measurement