Description
The ATmega603/103 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega603/103 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed.

Features
• Utilizes the AVR® Enhanced RISC Architecture
• 121 Powerful Instructions - Most Single Clock Cycle Execution
• 128K bytes of In-System Reprogrammable Flash ATmega103/L 64K bytes of In-System Reprogrammable Flash ATmega603/L
    – SPI Interface for In-System Programming
    – Endurance: 1,000 Write/Erase Cycles
• 4K bytes EEPROM ATmega103/L 2K bytes of EEPROM ATmega603/L
    – Endurance: 100,000 Write/Erase Cycles
• 4K bytes Internal SRAM
• 32 x 8 General Purpose Working Registers + Peripheral Control Registers
• 32 Programmable I/O Lines, 8 Output Lines, 8 Input Lines
• Programmable Serial UART + SPI Serial Interface
• VCC Supply
    – 2.7 - 3.6V ATmega603L/ATmega103L
    – 4.0 - 5.5V ATmega603/ATmega103
• Fully Static Operation
    – 0 - 6 MHz ATmega603/ATmega103
    – 0 - 4 MHz ATmega603L/ATmega103L
• Up to 6 MIPS Throughput at 6 MHz
• RTC with Separate Oscillator
• Two 8-Bit Timer/Counters with Separate Prescaler and PWM
• One 16-Bit Timer/Counter with Separate Prescaler, Compare, Capture Modes and Dual 8-, 9- or 10-Bit PWM
• Programmable Watchdog Timer with On-Chip Oscillator
• On-Chip Analog Comparator
• 8-Channel, 10-Bit ADC
• Low Power Idle, Power Save and Power Down Modes
• Software Selectable Clock Frequency
• Programming Lock for Software Security