PAGING DECODER

S70L41B is a fully integrated CMOS POCSAG (CCIR Radio Paging code No. 1) decoder and page controller for display paters. The decoded POCSAG data are transferred over a serial interface to a microcontroller according to its commands for processing and subsequent storage and display.

Its on chip buffer resiter allows the microcontroller to saty in subclock (low frequency) mode in receiving interrupt requests from S70L41B.
S70L41B also has an improved synchronization algorithm for efficient power saving.

In addition to its conventional decoding and error correcting function, it has a data conversion function for Chinese characters. With 76.8kHz Xtal oscillator, the decoder can be applied to any one of 512,1200 and 2400 bps system by using its internal resiters.