CS5954AM
ADVANCE
INFORMATION
Document #: 38-08025 Rev. **
Page 2 of 44
Table of Contents
1.0 DEFINITIONS ................................................................................................................................... 5
2.0 REFERENCES ................................................................................................................................. 5
3.0 INTRODUCTION .............................................................................................................................. 5
3.1 Overview .......................................................................................................................................... 5
3.2 Features ........................................................................................................................................... 5
3.3 CS5954AM 16-bit RISC Processor ................................................................................................ 6
3.4 3K×16 Mask ROM and BIOS ........................................................................................................... 6
3.5 Internal RAM .................................................................................................................................... 7
3.6 Clock Generator .............................................................................................................................. 7
3.7 USB Interface .................................................................................................................................. 7
3.8 Processor Control Registers ......................................................................................................... 7
3.9 Interrupts ......................................................................................................................................... 7
3.10 2-Wire Serial EEPROM Interface ................................................................................................. 7
3.11 External SRAM Interface .............................................................................................................. 7
3.12 General Timers and Watchdog Timer .........................................................................................7
3.13 Special GPIO Functionality for Suspend, Resume, and Low-power Modes ........................... 7
3.14 CS5954AM Interface Modes ......................................................................................................... 7
3.14.1 General-purpose I/O Mode (GPIO) ..................................................................................................... 7
4.0 INTERFACE ..................................................................................................................................... 8
4.1 Internal Masked ROM: 0xE800–0xFFFF ........................................................................................ 8
4.2 External ROM: 0xC100–0xE800 ..................................................................................................... 8
4.3 Internal RAM: 0x0000–0x0BFF ...................................................................................................... 8
4.4 Clock Generator .............................................................................................................................. 9
4.5 USB Interface ................................................................................................................................ 10
4.5.1 USB Global Control and Status Register (0xC080: R/W) ................................................................. 10
4.5.2 USB Frame Number Register (0xC082: Read-only) .......................................................................... 11
4.5.3 USB Address Register (0xC084: R/W) ............................................................................................... 11
4.5.4 USB Command Done Register (0xC086: Write-only) ....................................................................... 11
4.6 USB Endpoint 0 Control and Status Register (0xC090: R/W) ................................................... 11
4.7 USB Endpoint 1 Control and Status Register (0xC092: R/W) ................................................... 11
4.8 USB Endpoint 2 Control and Status Register (0xC094: R/W) ................................................... 11
4.9 USB Endpoint 3 Control and Status Register (0xC096: R/W) ................................................... 11
4.9.1 General Description for All Endpoints from Endpoint 0 to Endpoint 3 .......................................... 11
4.9.2 USB Endpoint Control (for Writing) ................................................................................................... 11
4.9.3 USB Endpoints Status (for Reading) ................................................................................................. 12
4.9.4 USB Endpoint 0 Address Register (0x0120: R/W) ............................................................................12
4.9.5 USB Endpoint 1 Address Register (0x0124: R/W) ............................................................................12
4.9.6 USB Endpoint 2 Address Register (0x0128: R/W) ............................................................................12
4.9.7 USB Endpoint 3 Address Register (0x012C: R/W) ........................................................................... 12
4.9.8 USB Endpoint 0 Count Register (0x0122: R/W) ................................................................................ 12
4.9.9 USB Endpoint 1 Count Register (0x0126: R/W) ................................................................................ 12
4.9.10 USB Endpoint 2 Count Register (0x012A: R/W) .............................................................................12
4.9.11 USB Endpoint 3 Count Register (0x012E: R/W) .............................................................................. 12
4.10 Processor Control Registers ..................................................................................................... 13
4.10.1 Configuration Register (0xC006: R/W) ............................................................................................ 13
4.10.2 Speed Control Register (0xC008: R/W) ........................................................................................... 14
4.10.3 Power-down Control Register (0xC00A: R/W) ................................................................................ 14
4.10.4 Breakpoint Register (0xC014: R/W) ................................................................................................. 15
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