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AD5522JSVDZ Arkusz danych(PDF) 58 Page - Analog Devices

Numer części AD5522JSVDZ
Szczegółowy opis  Quad Parametric Measurement Unit with Integrated 16-Bit Level Setting DACs
PDF  65 Pages
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AD5522JSVDZ Arkusz danych(HTML) 58 Page - Analog Devices

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Data Sheet
AD5522
Rev. E | Page 57 of 64
READBACK OF DAC REGISTER
The DAC register readback function is a 24-bit word that includes the mode, address, and DAC data bits.
Table 35. DAC Register Readback
Bit
Bit Name
Description
23 (MSB)
MODE1
The MODE1 and MODE0 bits indicate the type of DAC register (X1, M, or C) that is read.
01 = DAC gain (M) register.
10 = DAC offset (C) register.
11 = DAC input data (X1) register.
22
MODE0
DAC Register-Specific Bits
21 to 16
A5 to A0
Address bits indicating the DAC register that is read (see Table 29).
15 to 0 (LSB)
D15 to D0
Contents of the addressed DAC register (X1, M, or C).



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