PIC12CE518 datasheet(13/113 Pages) MICROCHIP

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DS40139E-page 13

PIC12C5XX

4.0

MEMORY ORGANIZATION

PIC12C5XX memory is organized into program mem-

ory and data memory. For devices with more than 512

bytes of program memory, a paging scheme is used.

Program memory pages are accessed using one STA-

TUS register bit. For the PIC12C509, PIC12C509A,

PICCR509A and PIC12CE519 with a data memory

scheme is used. Data memory banks are accessed

using the File Select Register (FSR).

4.1

Program Memory Organization

The PIC12C5XX devices have a 12-bit Program

Counter (PC) capable of addressing a 2K x 12

program memory space.

Only the first 512 x 12 (0000h-01FFh) for the

PIC12C508, PIC12C508A and PIC12CE518 and 1K x

12 (0000h-03FFh) for the PIC12C509, PIC12C509A,

PIC12CR509A,

and

PIC12CE519

are

physically

implemented.

Refer

Figure 4-1.

Accessing

location above these boundaries will cause a wrap-

around within the first 512 x 12 space (PIC12C508,

PIC12C508A and PIC12CE518) or 1K x 12 space

(PIC12C509,

PIC12C509A,

PIC12CR509A

and

PIC12CE519). The effective reset vector is at 000h,

(see

Figure 4-1).

Location

01FFh

(PIC12C508,

PIC12C508A and PIC12CE518) or location 03FFh

(PIC12C509,

PIC12C509A,

PIC12CR509A

and

PIC12CE519)

contains the internal clock oscillator

calibration

value.

This

value

should

never

overwritten.

FIGURE 4-1:

PROGRAM MEMORY MAP

AND STACK

CALL, RETLW

PC<11:0>

Stack Level 1

Stack Level 2

0000h

7FFh

01FFh

0200h

On-chip Program

Memory

Reset Vector (note 1)

Note 1: Address 0000h becomes the

effective reset vector. Location

01FFh (PIC12C508, PIC12C508A,

PIC12CE518) or location 03FFh

(PIC12C509, PIC12C509A,

PIC12CR509A, PIC12CE519) con-

tains the MOVLW XX INTERNAL RC

oscillator calibration value.

512 Word

1024 Word

03FFh

0400h

On-chip Program

Memory

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