PSOC4100S datasheet(9/42 Pages) CYPRESS

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PSoC® 4: PSoC 4100S Plus

Datasheet

Document Number: 002-19966 Rev. *F

Page 9 of 42

Special Function Peripherals

CapSense

CapSense is supported in the PSoC 4100S Plus through a

CapSense Sigma-Delta (CSD) block that can be connected to

any pins through an analog multiplex bus via analog switches.

CapSense function can thus be provided on any available pin or

group of pins in a system under software control. A PSoC

Creator component is provided for the CapSense block to make

it easy for the user.

Shield voltage can be driven on another analog multiplex bus to

provide water-tolerance capability. Water tolerance is provided

by driving the shield electrode in phase with the sense electrode

to keep the shield capacitance from attenuating the sensed

input. Proximity sensing can also be implemented.

The CapSense block has two IDACs, which can be used for

general purposes if CapSense is not being used (both IDACs are

available in that case) or if CapSense is used without water

tolerance (one IDAC is available).

The CapSense block also provides a 10-bit Slope ADC function

which can be used in conjunction with the CapSense function.

The CapSense block is an advanced, low-noise, programmable

block with programmable voltage references and current source

ranges for improved sensitivity and flexibility. It can also use an

external reference voltage. It has a full-wave CSD mode that

alternates sensing to VDDA and ground to null out power-supply

related noise.

LCD Segment Drive

PSoC 4100S Plus has an LCD controller, which can drive up to

4 commons and up to 50 segments. It uses full digital methods

to drive the LCD segments requiring no generation of internal

LCD voltages. The two methods used are referred to as Digital

Correlation and PWM. Digital Correlation pertains to modulating

the frequency and drive levels of the common and segment

signals to generate the highest RMS voltage across a segment

to light it up or to keep the RMS signal to zero. This method is

good for STN displays but may result in reduced contrast with TN

(cheaper) displays. PWM pertains to driving the panel with PWM

signals to effectively use the capacitance of the panel to provide

the integration of the modulated pulse-width to generate the

desired LCD voltage. This method results in higher power

consumption but can result in better results when driving TN

displays. LCD operation is supported during Deep Sleep

refreshing a small display buffer (4 bits; one 32-bit register per

port).

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