RFHCS362F datasheet(25/60 Pages) MICROCHIP

25 / 60 page

Preliminary

DS41189A-page 25

rfHCS362G/362F

4.5.12

HEADER

When PWM mode is selected the header length (low

time between preamble and data bits start) can be set

to 10 x TE or 3 x TE. The 10 x TE mode is recommended

for compatibility with previous KEELOQ encoder mod-

els. In Manchester mode, the header length is fixed and

set to 4 x TE.

4.5.13

RFEN

selects whether the RFEN output is enabled or

disabled. If enabled, S3 is only sampled 2 s after the

last button is released and at the start of the first trans-

mission. If disabled S3 functions the same as the other

S inputs. For typical implementation of the rfHCS362G/

362F the RFEN bit = 0.

4.6

SYNCHRONOUS MODE

In Synchronous mode, the code word can be clocked

out on DATA using S2 as a clock. To enter Synchro-

nous mode, S2 must be taken HIGH and then DATA

and S0 or S1 are taken HIGH. After Synchronous mode

is entered, DATA and S2 must be taken LOW. The data

is clocked out on DATA on every falling edge of S2.

Auto-shutoff timer is not disabled in Synchronous

mode. Refer to Figure 4-1 and Figure 4-2.

FIGURE 4-1:

SYNCHRONOUS TRANSMISSION MODE

FIGURE 4-2:

CODE WORD ORGANIZATION (SYNCHRONOUS TRANSMISSION MODE)

“01,10,11”

DATA

S0 or S1

TPS

TPH1 TPH2

t = 50ms

Preamble

Header

Data

RFEN

TRFON

35 pulses on S2

QUEUE

(2 bits)

CRC

(2 bits)

Vlow

(1-bit)

Button

Status

S2 S1 S0 S3

Serial Number

(28 bits)

Button

Status

S2 S1 S0 S3

DISC+ OVR

(12 bits)

Sync Counter

(16 bits)

69 Data bits

Transmitted

LSb first.

LSb

MSb

Fixed Portion

Encrypted Portion

RFHCS362F Arkusz danych(PDF) 25 Page - Microchip Technology

RFHCS362F Arkusz danych(HTML) 25 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Arkusz danych Pobierz

Link URL