HT27LC040 datasheet(5/15 Pages) HOLTEK

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HT27LC040

Rev. 1.30

December 8, 2003

Program Verify Mode

Verification should be performed on the programmed

bits to determine whether they were correctly pro-

grammed. The verification should be performed with OE

at VIL, and CE at VIH, and VPP at its programming volt-

age.

Auto Product Identification

The Auto Product Identification mode allows the reading

out of a binary code from an EPROM that will identify its

manufacturer and the type. This mode is intended for

programming to automatically match the device to be

programmed with its corresponding programming algo-

rithm. This mode is functional in the 25

°C±5°C ambient

temperature range that is required when programming

the HT27LC040.

To activate this mode, the programming equipment

must force 12.0

±0.5V on the address line A9 of the

HT27LC040. Two identifier bytes may then be se-

quenced from the device outputs by toggling address

line A0 from VIL to VIH, when A1=VIH. All other address

lines must be held at VIH during Auto Product Identifica-

tion mode.

Byte 0 (A0=VIL) represents the manufacturer code, and

byte 1 (A0=VIH), the device code. For HT27LC040,

these two identifier bytes are given in the Operation

mode truth table. When A1=VIL, the HT27LC040 will

read out the binary code of 7F, continuation code, to sig-

nify the unavailability of manufacturer ID codes.

Read Mode

The has two control functions, both of which must be

logically satisfied in order to obtain data at outputs. Chip

Enable (CE) is the power control and should be used for

device selection. Output Enable (OE) is the output con-

trol and should be used to gate data to the output pins,

independent of device selection. Assuming that ad-

dresses are stable, address access time (tACC) is equal

to the delay from CE to output (tCE). Data is available at

the outputs (tOE) after the falling edge of OE, assuming

the CE has been LOW and addresses have been stable

for at least tACC-tOE.

Standby Mode

The HT27LC040 has CMOS standby mode which re-

duces the maximum VCC current to 10

mA. It is placed in

CMOS standby when CE is at VCC

±0.3V. The

HT27LC040 also has a TTL-standby mode which re-

duces the maximum VCC current to 0.6mA. It is placed

in TTL-standby when CE is at VIH. When in standby

mode, the outputs are in a high-impedance state, inde-

pendent of the OE input.

Two-line Output Control Function

To accommodate multiple memory connections, a

two-line control function is provided to allow for:

· Low memory power dissipation

· Assurance that output bus contention will not occur

It is recommended that CE be decoded and used as the

primary device-selection function, while OE be made a

common connection to the READ line from the system

control bus. This assures that all deselected memory

devices are in their low-power standby mode and that

the output pins are only active when data is desired from

a particular memory device.

System Considerations

During the switch between active and standby condi-

tions, transient current peaks are produced on the rising

and falling edges of Chip Enable. The magnitude of

these transient current peaks is dependent on the out-

put capacitance loading of the device. At a minimum, a

0.1

mF ceramic capacitor (high frequency, low inherent

inductance) should be used on each device between

VCC and VPP to minimize transient effects. In addition,

to overcome the voltage drop caused by the inductive

effects of the printed circuit board traces on EPROM ar-

rays, a 4.7

mF bulk electrolytic capacitor should be used

between VCC and VPP for each eight devices. The lo-

cation of the capacitor should be close to where the

power supply is connected to the array.

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