LT8602 datasheet(29/38 Pages) LINER

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LT8603

8603f

For more information www.linear.com/LT8603

APPLICATIONS INFORMATION

VRIPPLE = ∆IL • ESR, for aluminum or tantalum

where VRIPPLE is the peak-to-peak output ripple, fSW is

the switching frequency, ∆IL is the peak-to-peak ripple

current in the inductor, COUT is the output capacitor value

in µF and ESR is the output capacitor series resistance.

The low ESR and small size of ceramic capacitors make

them the preferred type for LT8603 applications. However,

not all ceramic capacitors are the same. Many of the

higher value capacitors use dielectrics with high tem-

perature and voltage coefficients. In particular Y5V and

Z5U types lose a large fraction of their capacitance with

applied voltage and at temperature extremes. Because

loop stability, transient response ripple and EMI depend

on the value of the input and output capacitors it is best

to use X5R (max 85°C) or X7R (max 125°C) capacitors

depending on the operating temperature range.

Electrolytic capacitors are also an option. The ESRs of

most aluminum electrolytic capacitors are too large to

deliver low output ripple. Tantalum, as well as newer,

lower ESR organic electrolytic capacitors intended for

power supply use are suitable. Choose a capacitor with a

low enough ESR for the required output ripple. Because

the volume of the capacitor determines its ESR, both the

size and value will be larger than a ceramic capacitor that

would give similar ripple performance. One benefit is that

larger capacitance may give better transient response for

large changes in load current.

The Typical Applications section provides a reason-

able starting point for output capacitor values. Note, for

applications that intend to operate near minimum on-

time, larger output capacitance values may be required

to minimize output voltage ripple. Careful evaluation of

each application must be made to ensure adequate design

margin.

Buck: Boost Capacitor Selection

The high voltage channels require a voltage above PVIN

to drive the gates of the top NFET switches. Connecting a

capacitor between each channel’s BST and SW pins cre-

ates this voltage with an approximate value of 3.3V. For

most applications, a 0.1μF ceramic capacitor is a good

choice.

Buck: RUN, Soft-Start, Tracking

In addition to the global EN/UVLO pin that controls the

entire chip, each channel has its own independent control

pin or pins.

The low voltage channel has a RUN pin with a fixed inter-

nal threshold of 1.2V. When the RUN pin exceeds 1.2V, a

soft start is initiated which brings the low voltage channel

into regulation in approximately 1.0ms.

Channel 1 and Channel 2 have dual purpose TRKSSx

control pins which can be used to ramp each output in a

controlled way. Each channel’s feedback pin voltage will

regulate to the lower of the corresponding TRKSS pin

and the internal 1V reference. These pins can therefore

provide output voltage tracking. In addition, there is an

internal constant current pull-up of 2.4μA at each TRKSS

pin that can be used to charge an external capacitor to

provide a programmable output soft-start function. The

soft-start ramp time can be calculated from:

tSS = CTRKSS •

2.4µA

The TRKSSx pin is pulled down through approximately

330Ω. It will be pulled down if temperature protection is

activated.

To achieve coincident tracking, connect a resistor divider

from the controlling output to the TRKSS pin of the slave

output. Figure 10 shows the divider required for Channel 2

to track VOUT1. With this circuit, R1 and R2 values should

be chosen to minimize the offset from the 2.4µA pull-

up current. To achieve ratiometric tracking, connect both

TRKSS1 and TRKSS2 to a single capacitor to ground.

Figure 10 shows the output waveforms for both coinci-

dent and ratiometric tracking. Note: Pulling TRKSS1 and

TRKSS2 to ground does not guarantee the respective

channel will never display a switching cycle.

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