ADL5330ACPZ-R2 datasheet(8/24 Pages) AD

8 / 24 page

ADL5330

Data Sheet

Rev. B | Page 8 of 24

–155

–115

–130

–125

–120

–145

–140

–135

–150

VGAIN (V)

1.4

0.2

0.4

0.6

0.8

1.0

1.2

–10

–20

–30

–40

OIP3

INPUT P1dB

OUTPUT P1dB

Figure 9. Input Compression Point, Output Compression Point,

OIP3, and Noise Floor vs. VGAIN at 100 MHz

–155

–115

–130

–125

–120

–145

–140

–135

–150

VGAIN (V)

1.4

0.4

0.2

0.8

0.6

1.0

1.2

–10

–20

–30

–40

OIP3

OUTPUT P1dB

INPUT P1dB

Figure 10. Input Compression Point, Output Compression Point,

OIP3, and Noise Floor vs. VGAIN at 450 MHz

–155

–115

–120

–125

–130

–135

–140

–145

–150

VGAIN (V)

1.4

0.4

0.2

0.6

0.8

1.0

1.2

–10

–20

–30

–40

OIP3

INPUT P1dB

OUTPUT P1dB

Figure 11. Input Compression Point, Output Compression Point,

OIP3, and Noise Floor vs. VGAIN at 900 MHz

–155

–115

–130

–125

–120

–150

–145

–140

–135

VGAIN (V)

1.4

0.2

0.4

0.6

0.8

1.0

1.2

–10

–20

–30

–40

–50

INPUT P1dB

OIP3

OUTPUT P1dB

Figure 12. Input Compression Point, Output Compression Point,

OIP3, and Noise Floor vs. VGAIN at 2200 MHz

–160

–155

–120

–140

–135

–130

–125

–150

–145

VGAIN (V)

1.4

0.2

0.4

0.6

0.8

1.0

1.2

–10

–20

–30

–40

–50

INPUT P1dB

OIP3

OUTPUT P1dB

Figure 13. Input Compression Point, Output Compression Point,

OIP3, and Noise Floor vs. VGAIN at 2700 MHz

CH1 200mV CH2 100mV



M100ns

A CH4

2.70V

382.000ns

Figure 14. Step Response of Gain Control Input

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