LTC1643AHIGN datasheet(7/16 Pages) LINER

7 / 16 page

LTC1643AL

LTC1643AL-1/LTC1643AH

1643afa

3VSENSE (Pin 10): The 3.3V Current Limit Set Pin. With a

sense resistor placed in the supply path between 3VIN and

3VSENSE, the GATE pin voltage will be adjusted to maintain

a constant voltage across the sense resistor and a con-

stant current through the switch. A foldback feature makes

the current limit decrease as the voltage at the 3VOUT pin

approaches GND. To disable the current limit, 3VSENSE

and 3VIN can be shorted together.

GATE (Pin 11): High Side Gate Drive for the External

N-Channel Pass Transistors. Requires an external series

RC network for the current limit loop compensation and

setting the minimum ramp-up rate. During power-up, the

slope of the voltage rise at the GATE is set by the 62

µA

current source connected to 12VIN and the external ca-

pacitor connected to GND or by the 3.3V or 5V current limit

and the bulk capacitance on the 3VOUT or 5VOUT suppy

lines. During power-down, the slope of the falling voltage

is set by the 200

µA current source connected to GND and

the external GATE capacitor.

The voltage at the GATE pin will be modulated to maintain

a constant current when either the 3V or 5V supplies go

into current limit. When a current limit fault occurs after

the inhibit period set by the TIMER pin capacitance, the

undervoltage lockout circuit on 3.3V, 5V or 12V trips or

the FAULT pin is pulled low, the GATE pin is immediately

pulled to GND.

5VSENSE (Pin 12): 5V Current Limit Set Pin. With a sense

resistor placed in the supply path between 5VIN and

5VSENSE, the GATE pin voltage will be adjusted to maintain

a constant voltage across the sense resistor and a con-

stant current through the switch. A foldback feature makes

the current limit decrease as the voltage at the 5VOUT pin

approaches GND. To disable the current limit, 5VSENSE

and 5VIN can be shorted together.

5VIN (Pin 13): Analog Input. Used to monitor the 5V input

supply voltage. An undervoltage lockout circuit prevents

the switches from turning on when the voltage at the 5VIN

pin is less than 2.5V typically.

5VOUT (Pin 14): Analog Input. Used to monitor the 5V

output supply voltage. The PWRGD signal cannot go high

until the 5VOUT pin exceeds 4.65V typically.

the ON pin pulled low, the GATE pin is pulled high by a

µA current source and the internal 12V and –12V

switches are turned on. When the ON pin is pulled low or

the ON pin pulled high, the GATE pin will be pulled to

ground by a 200

µA current source and the 12V and –12V

switches turned off.

The ON/ON pin is also used to reset the electronic circuit

breaker. If the ON/ON pin is cycled following the trip of the

circuit breaker, the circuit breaker is reset and a normal

power-up sequence will occur.

FAULT (Pin 6): Open-Drain Digital I/O. FAULT is pulled low

when a current limit fault is detected. Current limit faults

are ignored while the voltage at the TIMER pin is less than

12VIN – 0.9V. Once the TIMER cycle is complete, FAULT

will pull low typically 14.6

µs after any of the supplies go

into current limit. At the same time, the GATE and TIMER

pins are pulled to GND and the 12V and –12V switches are

turned off. The chip will remain latched in the off state until

the ON/ON pin is toggled or the power is cycled.

Forcing the FAULT pin low with an external pull-down will

immediately turn off the internal switches and force the

GATE and TIMER pins to GND independent of the state of

the ON/ON pin. However, the chip is not latched into the off

state, so when the FAULT pin is released, the state of the

chip will be determined by the ON pin.

PWRGD (Pin 7): Open-Drain Digital Power-Good Output.

PWRGD remains low while V12VOUT ≥ 11.4V, V3VOUT ≥ 3V,

V5VOUT ≥ 4.75V and VEEOUT ≤ – 10.8V. The LTC1643AL-1

has the power good comparators connected to the 12VOUT

and VEEOUT pins disabled, with only the 3VOUT and 5VOUT

outputs being monitored to generate PWRGD. When one

of the supplies falls below its power-good threshold

voltage, PWRGD will go high after a 15

µs deglitching time.

The switches will

not be turned off when PWRGD goes

high.

GND (Pin 8): Chip Ground.

3VIN (Pin 9): 3.3V Supply Sense Input. An undervoltage

lockout circuit prevents the switches from turning on

when the voltage at the 3VIN pin is less than 2.5V typically.

If no 3.3V input supply is available, tie 3VIN to the 5VIN pin.

PIN FUNCTIONS

LTC1643AHIGN Arkusz danych(PDF) 7 Page - Linear Technology

LTC1643AHIGN Arkusz danych(HTML) 7 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

Arkusz danych Pobierz

Link URL