CS45-08io1

0.01

0.1

1

200

250

300

350

400

450

0.5

1.0

1.5

2.0

0

20

40

60

80

100

0.0

0.1

0.2

0.3

0.4

I

TSM

[A]

I

T

[A]

V

t [ms]

Z

thJC

[K/W]

2

3

4 5 6 7 8 9 0

1

1

100

1000

10000

I

[A

t [ms]

I

T(AV)M

[A]

T

0

25

50

75 100 125 150 175

0

20

40

60

80

Fig. 1 Forward characteristics

Fig. 3 I

t [s]

Fig. 6 Max. forward current

at case temperature

Fig. 2 Surge overload current

Fig. 8 Transient thermal impedance junction to case

T

T

T

50 Hz, 80% V

RRM

T

T

V

125°C

150°C

0

20

40

0

20

40

60

80

I

P

(AV)

[W]

Fig. 7a Power dissipation versus direct output current

Fig. 7b and ambient temperature

0

50

100

150

T

dc =

1

0.5

0.4

0.33

0.17

0.08

10

100

1000

1

10

100

1000

1

10

100

1000

10000

0.1

1

10

I

V

G

[V]

t

gd

[µs]

I

typ.

Limit

T

Fig. 4 Gate trigger characteristics

Fig. 5 Gate controlled delay time

6

4

5

2

1

3

1: I

R

thHA

0.6

0.8

1.0

2.0

4.0

8.0

dc =

1

0.5

0.4

0.33

0.17

0.08

4: P

R

t

0.044

0.011

0.039

0.0001

0.047

0.02

0.09

0.4

0.18

0.12

Thyristor

IXYS reserves the right to change limits, conditions and dimensions.

20150827d

Data according to IEC 60747and per semiconductor unless otherwise specified

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