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ICS8545BGLF Arkusz danych(PDF) 3 Page - Integrated Device Technology |
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ICS8545BGLF Arkusz danych(HTML) 3 Page - Integrated Device Technology |
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3 / 15 page ![]() 3 2016© Integrated Device Technology, Inc. Revision E, January 5, 2016 8545 Datasheet Function Tables Table 3A. Control Input Function Table After CLK_EN switches, the clock outputs are disabled or enabled following a rising and falling input clock edge as shown in Figure 1. In the active mode, the state of the outputs are a function of the CLK1 and CLK2 inputs as described in Table 3B. Figure 1. CLK_EN Timing Diagram Table 3B. Clock Input Function Table Inputs Outputs OE CLK_EN CLK_SEL Selected Source Q0:Q3 Q0:Q3 0 X X Hi-Z Hi-Z 1 0 0 CLK1 Low High 1 0 1 CLK2 Low High 1 1 0 CLK1 Active Active 1 1 1 CLK2 Active Active Inputs Outputs CLK1 or CLK2 Q0:Q3 Q0:Q3 0LOW HIGH 1HIGH LOW Enabled Disabled CLK1, CLK2 CLK_EN Q0:Q3 Q0:Q3 |
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