MMPF0200 datasheet(48/114 Pages) NXP

48 / 114 page

NXP Semiconductors

PF0200

FUNCTIONAL BLOCK REQUIREMENTS AND BEHAVIORS

Figure 14. SW2 efficiency waveforms

6.4.4.5

SW3A/B

SW3A/B are 1.25 to 2.5 A rated buck regulators, depending on the configuration. Table 28 describes the available switching modes and

Table 29 show the actual configuration options for the SW3xMODE[3:0] bits.

SW3A/B can be configured in various phasing schemes, depending on the desired cost/performance trade-offs. The following

configurations are available:

• A single phase

• Independent regulators

The desired configuration is programmed in OTP by using the SW3_CONFIG[1:0] bits.Table 57 shows the options for the SW3CFG[1:0]

bits.

SW3A/B single phase

In this configuration, SW3ALX and SW3BLX are connected in single phase with a single inductor a shown in Figure 15. This configuration

reduces cost and component count. Feedback is taken from the SW3AFB pin and the SW3BFB pin must be left open. Although control

is from SW3A, registers of both regulators, SW3A and SW3B, must be identically set.

Table 57. SW3 Configuration

SW3_CONFIG[1:0]

Description

A/B Single Phase

Reserved

A/B Independent

100

0.1

100

1000

)

Load Current (mA)

PFM - Vout = 3.15V

APS - Vout = 3.15V

PWM - Vout = 3.15V

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