STV3500 datasheet(1/3 Pages) STMICROELECTRONICS

Numer części	STV3500

Szczegółowy opis	Integrated Up-Convertor with 32-bit CPU Core with Video Enhancers and Bitmap On-Screen Display

PDF	3 Pages

Scroll/Zoom	100%

Producent	STMICROELECTRONICS [STMicroelectronics]

Strona internetowa	http://www.st.com

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DATA BRIEF

November 2004

STV3500

Integrated Up-Convertor with 32-bit CPU Core

with Video Enhancers and Bitmap On-Screen Display

Rev. 1

FEATURES

■ Versatile integrated up-converter

– 100/120-Hz Interlaced: AABB, AA*B*B,

AA*BB*, ABAB or AAAA field-repeat

– Motion driven 100-Hz up-conversion based

on Median filter

– 50/60-Hz progressive with line-interpolation,

field-merging with motion-adaptive de-

interlacing

– Advanced still picture modes: AA*AA* and

ABAB interlaced or AAAA non-interlaced

– Automatic movie mode detection and

scanning

■ Standard definition input

– ITU-R BT.656/601 video input

– Separate H/V inputs synchronous with input

clock

– 3D temporal noise reduction with comet-

effect correction

– Movie mode detection with motion phase

recovery

– Scene-change detector for contrast enhancer

and up-conversion control

– Letterbox format detection and auto-format

correction

■ High-quality video display

– Picture structure improvement including color

transition improvement, luma peaking/coring

and luma contrast enhancer

– H/V format conversion with zoom In/Out (4x

to 1/8x) with H/V decimation

– Letterbox and 4:3 to 16:9 format conversion

with programmable 5-segment panoramic

mode

– Very flexible sync generator for master and

slave modes by Vsync and Hsync signals

with line-locked pixel clock

– Progressive display mode (60 Hz, 525 lines)

for full-screen graphic planes

– Support for monitor mode: VGA, SVGA, XGA

– Mosaic mode with up to 16 pictures displayed

■ High-Performance 8-bit Bitmap OSD Generator

– Pixel-based resolution with 10-bit RGB

outputs

– Programmable Resolution up to 1920x1024,

all standard displays are supported: teletext

1.5 (480x520) and 2.5 (672x520), double-

page teletext (960x520) with picture& text,

teleWeb (640x480)

– 4 graphic planes with full alpha-blending

capabilities: 24-bit background plane, 10-bit

RGB video plane, bitmap OSD plane with

color map, up to 128 x 128 pixel cursor plane

– 2D graphics accelerator

■ Embedded 32-bit ST20 CPU core

■ Peripherals and I/Os for TV Chassis Control

– 30 fully-programmable I/Os (5V tolerant)

– 4 external interrupts

– 8-bit programmable PWM with 4 inputs/

outputs

– Infrared digital preprocessor

– Real time clock and watchdog timer

– 4 16-bit standard timers

– 10-bit ADC with 6 inputs and wake-up

capability

– 2 Master/slave I²C bus interfaces

– UART and support for IrDA interfaces

■ Teletext 1.5 and 2.5, Closed-Caption, VPS and

WSS VBI data decoding, TeleWeb compliant

■ Embedded emulation resources with in-situ

flash programming capabilities

■ 1.8V and 3.3V power supplies

■ Eco standby mode

■ 27-MHz crystal oscillator

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