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AD5231 Arkusz danych(PDF) 21 Page - Analog Devices |
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AD5231 Arkusz danych(HTML) 21 Page - Analog Devices |
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21 / 24 page ![]() REV. 0 AD5231 –21– R1 R2 VO A B W Figure 31. Resistor Scaling with Pseudo Log Adjust- ment Characteristics RDAC CIRCUIT SIMULATION MODEL The internal parasitic capacitances and the external load dominates the ac characteristics of the RDACs. Configured as a potentiom- eter divider the –3 dB bandwidth of the AD5231BRU10 (10 k Ω resistor) measures 370 kHz at half scale. TPC 10 provides the large signal BODE plot characteristics. A parasitic simulation mode is shown in Figure 32. Listing I provides a macro model net list for the 10 k Ω RDAC: AB RDAC 10k W CW 50pF CB 50pF CA 50pF Figure 32. RDAC Circuit Simulation Model for RDAC = 10 k Ω Listing I. Macro Model Net List for RDAC .PARAM D = 1024, RDAC = 10E3 * .SUBCKT DPOT (A, W, B) * CA A 0 50E-12 RAW A W {(1-D/1024)*RDAC+15} CW W 0 50E-12 RBW W B {D/1024*RDAC+15} CB B 0 50E-12 * .ENDS DPOT |
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