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ICS8735-01 Arkusz danych(PDF) 6 Page - Integrated Circuit Systems

Numer części ICS8735-01
Szczegółowy opis  1:5 DIFFERENTIAL-TO-3.3V LVPECL ZERO DELAY CLOCK GENERATOR
PDF  17 Pages
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Producent  ICST [Integrated Circuit Systems]
Strona internetowa  http://www.icst.com
Logo ICST - Integrated Circuit Systems

ICS8735-01 Arkusz danych(HTML) 6 Page - Integrated Circuit Systems

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8735AY-01
www.icst.com/products/hiperclocks.html
REV. F NOVEMBER 12, 2004
6
Integrated
Circuit
Systems, Inc.
ICS8735-01
1:5 DIFFERENTIAL-TO-3.3V LVPECL
ZERO DELAY CLOCK GENERATOR
PARAMETER MEASUREMENT INFORMATION
OUTPUT SKEW
DIFFERENTIAL INPUT LEVEL
3.3V OUTPUT LOAD AC TEST CIRCUIT
SCOPE
Qx
nQx
LVPECL
2V
CYCLE-TO-CYCLE JITTER
-1.3V ± 0.165V
tsk(o)
nQx
Qx
nQy
Qy
V
CMR
Cross Points
V
PP
V
CC
V
EE
CLK0,
CLK1
nCLK0,
nCLK1
OUTPUT RISE/FALL TIME
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
PROPAGATION DELAY
PHASE JITTER & STATIC PHASE OFFSET
Clock
Outputs
20%
80%
80%
20%
tR
t F
VSWING
Pulse Width
t
PERIOD
t
PW
t
PERIOD
odc =
Q0:Q4
nQ0:nQ4
t
PD
CLK0,
CLK1
nCLK0,
nCLK1
Q0:Q4
nQ0:nQ4
➤
➤
tjit(cc) = tcycle n –tcycle n+1
1000 Cycles
tcycle n
tcycle n+1
Q0:Q4
nQ0:nQ4
(where
t(Ø) is any random sample, and t(Ø) mean is the average
of the sampled cycles measured on controlled edges)
t (Ø) mean = Static Phase Offset
➤t(Ø)
V
OH
V
OL
V
OH
V
OL
nCLK0,
nCLK1
nFB_IN
FB_IN
tjit(Ø) = t(Ø) — t(Ø) mean = Phase Jitter
CLK0,
CLK1
V
CC,
V
CCA,
V
CCO
V
EE



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