DM562AP datasheet(43/48 Pages) ETC1

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DM562AP

V.90 Integrated Data/ Fax/Voice/Speakerphone

Modem Device Single Chip with Memory Built in

Preliminary

Version: DM562AP-DS-P02

March 05, 2004

DM6580 Functional Description

In this chip, we could roughly divide it into two major

parts: digital portion and analog portion. The

functional blocks are described separately in this

section. The analog circuits include a sigma-delta

modulator/demodulator, decimation/interpolation

filters, a speaker driver, low-pass filter and certain

logic circuits. The digital circuits is composed of Tx/Rx

clock generator/PLL, serial port, serial/parallel

conversions and control registers. All the clock

information the analog circuits need should be

provided by the digital clock system since the best

sampling instant of A/D and D/A depends on the

received signal and transmit signals. The data format

of A/D and D/A is 2's complement.

The master clock (FQ) is obtained from an external

signal connected to CLKIN. The different transmit and

receive clocks are obtained by master clock

frequency division in several programmable counters.

The Tx and Rx clocks can be synchronized on

external signals by performing the phase shifts in the

frequency division process. Two independent digital

phase locked loops are implemented using this

principle, one for transmit clock system, the other,

receive clock. The tracking of the transmit clock is

automatically done by the transmit DPLL circuit. The

receive DPLL circuit is controlled by the host

processor and it is actually an adjustable phase

shifter.

DM6580 Register Description

D11

D10

Programme

dFunctions

TxCR0

Tx Data Rate

Clock

TxCR1

Tx Baud

sample Clock

TxCR2

Vol1

Vol2

ATT

LTX

SST

EMX

Miscellaneou

s control

TxTest

Reserved

RxCR0

Rx Data Rate

Clock

RxCR1

RST

Rx Baud

SampleClock

RxCR2

-6dB

PS4

PS3

PS2

PS1

PS0

AP2

AP1

AP0

Rx Phase

Shift Control

RxTest

Reserved

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