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COP8-NSDEV Arkusz danych(PDF) 21 Page - National Semiconductor (TI) |
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COP8-NSDEV Arkusz danych(HTML) 21 Page - National Semiconductor (TI) |
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21 / 83 page ![]() 10.0 Functional Description (Continued) 10.8 OSCILLATOR CIRCUITS The device has two crystal oscillators to facilitate low power operation while maintaining throughput when required. Fur- ther information on the use of the two oscillators is found in Section 7.0 Power Saving Features. The low speed oscillator utilizes the L0 and L1 port pins. References in the following text to CKI will also apply to L0 and references to G7/CKO will also apply to L1. 10.8.1 Oscillator CKI is the clock input while G7/CKO is the clock generator output to the crystal. An on-chip bias resistor connected between CKI and CKO is provided to reduce system part count. The value of the resistor is in the range of 0.5M to 2M (typically 1.0M). Table 2 shows the component values re- quired for various standard crystal values. Resistor R2 is on-chip, for the high speed oscillator, and is shown for reference. Figure 11 shows the crystal oscillator connection diagram. A ceramic resonator of the required frequency may be used in place of a crystal if the accuracy requirements are not quite as strict. TABLE 2. Crystal Oscillator Configuration, T A = 25˚C, VCC =5V R1 (k Ω)R2 (MΩ) C1 (pF) C2 (pF) CKI Freq. (MHz) 0 On Chip 18 18 10 0 On Chip 18 18 5 0 On Chip 18–36 18–36 1 5.6 On Chip 100 100–156 0.455 0 20 ** ** 32.768 kHz* *Applies to connection to low speed oscillator on port pins L0 and L1 only. **See Note below. 20006313 FIGURE 9. Brownout Reset Operation 20006314 FIGURE 10. Reset Circuit Using Power-On Reset www.national.com 21 |
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