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AM29PDL640G Arkusz danych(PDF) 44 Page - SPANSION

Numer części AM29PDL640G
Szczegółowy opis  64 Megabit (4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory with Enhanced VersatileIO Control
PDF  61 Pages
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February 26, 2003
Am29PDL640G
43
P R E L I M INARY
AC CHARACTERISTICS
Read-Only Operations
Notes:
1. Not 100% tested.
2. See Figure 10 and Table 17 for test specifications
3. Measurements performed by placing a 50 ohm termination on the data pin with a bias of VCC/2. The time from OE# high to
the data bus driven to VCC/2 is taken as tDF.
.
Parameter
Description
Test Setup
Speed Options
JEDEC
Std.
63
73
83
98
Unit
t
AVAV
t
RC
Read Cycle Time (Note 1)
Min
65
70
85
90
ns
t
AVQV
t
ACC
Address to Output Delay
CE#, OE# = V
IL
Max
65
70
85
90
ns
t
ELQV
t
CE
Chip Enable to Output Delay
OE# = V
IL
Max
65
70
85
90
ns
t
PACC
Page Access Time
Max
25
30
45
ns
t
GLQV
t
OE
Output Enable to Output Delay
Max
25
30
45
ns
t
EHQZ
t
DF
Chip Enable to Output High Z (Notes 1, 3)
Max
25
30
45
ns
t
GHQZ
t
DF
Output Enable to Output High Z (Notes 1, 3)
Max
25
30
45
ns
t
AXQX
t
OH
Output Hold Time From Addresses, CE# or
OE#, Whichever Occurs First
Min
4
5
ns
t
OEH
Output Enable Hold
Time (Note 1)
Read
Min
0
ns
Toggle and
Data# Polling
Min
10
ns
tOH
tCE
Data
WE#
Addresses
CE#f
OE#
HIGH Z
Valid Data
HIGH Z
Addresses Stable
tRC
tACC
tOEH
tRH
tOE
tRH
0 V
RY/BY#
RESET#
tDF
Figure 12.
Read Operation Timings



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