MT7697 datasheet(30/81 Pages) ETC2

Numer części	MT7697

Szczegółowy opis	MT7697 is a highly integrated single chip which features an application processor

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Producent	ETC2 [List of Unclassifed Manufacturers]

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MT7697

Internet-of-Things Wireless Connectivity

Page 30 of 81

This document contains information that is proprietary to MediaTek Inc. (“MediaTek”) and/or its licensor(s).

Any unauthorized use, reproduction or disclosure of this document in whole or in part is strictly prohibited.

3-bit prescaler

Reference clock rate for

de-bounce counter (KHz)

Minimum de-bounce

period (ms)

Maximum de-bounce

period (ms)

111

0.0625

256

2.4.10

Power-on Sequence

The power-on control sequence diagram shows how the code reset (PMU_RESET_N) is generated on

chip.

Figure 2-8. PMU Power-on Sequence

2.4.10.1 Power-on Reset (Cold Reset)

The power on reset sequence after chip power on is shown below.

Step 1: N9 reset is de-asserted and boot from ROM (CM4 reset state is still asserted)

Step 2: N9 sets up top configuration registers (such as PLL) and then de-asserts CM4 reset

Step 3: CM4 boots from ROM while N9 polls the PDA (Patch Decryption Accelerator) status

Step 4: CM4 fetch flash header (N9 FW download length information)

Step 5: CM4 setup PDA and PDA address generator

Step 6: PDA loads firmware from the flash to N9 IDLM

MT7697 Arkusz danych(PDF) 30 Page - List of Unclassifed Manufacturers