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GD25Q127CSJS Arkusz danych(PDF) 56 Page - GigaDevice Semiconductor (Beijing) Inc. |
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GD25Q127CSJS Arkusz danych(HTML) 56 Page - GigaDevice Semiconductor (Beijing) Inc. |
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56 / 79 page ![]() 3.3V Uniform Sector Dual and Quad Serial Flash GD25Q127C 56 tRST_E CS# High To Next Command After Reset (From Erase) 30 ms tW Write Status Register Cycle Time 15 80 ms tBP1 Byte Program Time (First Byte) 60 150 μs tBP2 Additional Byte Program Time (After First Byte) 8 40 μs tPP Page Programming Time 1.6 5 ms tSE Sector Erase Time 100 600 ms tBE1 Block Erase Time (32K Bytes) 0.3 1.4 s tBE2 Block Erase Time (64K Bytes) 0.5 2.6 s tCE Chip Erase Time (GD25Q127C) 150 300 s Note: 1. Typical value tested at T = 25℃. 2. Value guaranteed by design and/or characterization, not 100% tested in production. |
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