USB2227 datasheet(19/26 Pages) SMSC

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4th Generation USB2.0 Flash Media Controller with Integrated Card Power FETs

Datasheet

SMSC USB2227/USB2228

Revision 1.77 (06-13-05)

DATASHEET

GPIO6, ROMEN

GPIO6/ROMEN

IPU

This pin has an internal weak pull-up resistor that is

enabled or disabled by the state of nRESET.

The pull-up is enabled when nRESET is active.

The pull-up is disabled, when the nRESET is inactive

(some clock cycles later, after the rising edge of

nRESET).

The state of this pin is latched internally on the rising

edge of nRESET to determine if internal or external

program memory is used.

The state latched is stored in ROMEN bit of GPIO_IN1

I/O8

After the rising edge of nRESET, this pin may be used

as GPIO6 or RXD.

When pulled low via an external weak pull-down

resistor, an external program memory should be

connected to the memory data bus. The

USB2227/USB2228 uses this external bus for program

execution.

When this pin is left unconnected or pulled high by a

weak pull-up resistor, the USB2227/USB2228 uses the

internal ROM for program execution.

General Purpose

I/O

GPIO7

I/O8

This pin may be used either as input, edge sensitive

interrupt input, or output.

General Purpose

I/O

Card Power

GPIO8/

CRD_PWR0

I/O8

GPIO: This pin may be used either as input, edge

sensitive interrupt input, or output.

CRD_PWR: Card Power drive of 3.3V @ 100mA.

General Purpose

I/O

GPIO9

I/O8

This pin may be used either as input, edge sensitive

interrupt input, or output.

General Purpose

I/O

Card Power

GPIO10/

CRD_PWR1

I/O8

GPIO: These pins may be used either as input, edge

sensitive interrupt input, or output.

CRD_PWR: Card Power drive of 3.3V @ 100mA.

General Purpose

I/O

Card Power

GPIO11/

CRD_PWR2

I/O8

GPIO: This pin may be used either as input, edge

sensitive interrupt input, or output.

CRD_PWR: Card Power drive of 3.3V @ 200mA.

General Purpose

I/O

GPIO[15:12]

I/O8

These pins may be used either as input, or output.

RESET input

nRESET

This active low signal is used by the system to reset the

chip. The active low pulse should be at least 1

µs wide.

TEST Input

nTEST[1:0]

These signals are used for testing the chip. User should

normally tie them high externally, if the test function is

not used.

DIGITAL POWER, GROUNDS, and NO CONNECTS

1.8v Digital Core

Power

VDD18

+1.8V Core power

All VDD18 pins must be connected together on the

circuit board.

NAME

SYMBOL

BUFFER

TYPE

DESCRIPTION

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