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V62/12615-01XE-R Arkusz danych(PDF) 84 Page - Texas Instruments |
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V62/12615-01XE-R Arkusz danych(HTML) 84 Page - Texas Instruments |
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84 / 98 page ![]() 84 DP83848-EP SLLSEC6E – SEPTEMBER 2012 – REVISED JUNE 2019 www.ti.com Submit Documentation Feedback Product Folder Links: DP83848-EP Layout Copyright © 2012–2019, Texas Instruments Incorporated Figure 8-3. PCB Stripline Layer Stacking Within a PCB it may be desirable to run traces using different methods, microstrip vs stripline, depending on the location of the signal on the PCB. For example, it may be desirable to change layer stacking where an isolated chassis ground plane is used. Figure 8-4 illustrates alternative PCB stacking options. |
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